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Home > Archive > Unix Programming > November 2004 > more makefile help please
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more makefile help please
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| Billy Patton 2004-11-17, 5:51 pm |
| I have some sub makefiles
all have the following lines in common
@if [ "${IS_DEFAULT}" = file ]; then \
echo ${EX} > ${OUTDIR}/.is_default ; \
else \
echo > ${OUTDIR}/.is_default ; \
fi;
@date > ${OUTDIR}/.date
@printenv | sort > ${OUTDIR}/.environment
@echo ${LAFF} > ${OUTDIR}/.laff
@echo ${CELL} > ${OUTDIR}/.cell
How do I use a define or a $(call to make a subroutine out of this?
___ _ ____ ___ __ __
/ _ )(_) / /_ __ / _ \___ _/ /_/ /____ ___
/ _ / / / / // / / ___/ _ `/ __/ __/ _ \/ _ \
/____/_/_/_/\_, / /_/ \_,_/\__/\__/\___/_//_/
/___/
Texas Instruments ASIC Circuit Design Methodology Group
Dallas, Texas, 214-480-4455, b-patton@ti.com
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| Trent Buck 2004-11-17, 5:51 pm |
| Quoth Billy Patton on or about 2004-11-17:
> I have some sub makefiles
> all have the following lines in common
> @if [ "${IS_DEFAULT}" = file ]; then \
> echo ${EX} > ${OUTDIR}/.is_default ; \
> else \
> echo > ${OUTDIR}/.is_default ; \
> fi;
> @date > ${OUTDIR}/.date
> @printenv | sort > ${OUTDIR}/.environment
> @echo ${LAFF} > ${OUTDIR}/.laff
> @echo ${CELL} > ${OUTDIR}/.cell
>
> How do I use a define or a $(call to make a subroutine out of this?
How about this:
FUNC = @set -e ;\
test '$(1)' = 'file' \
&& echo $(2) > $(3)/.is_default \
|| touch $(3)/.is_default ;\
date > $(3)/.is_default ;\
printenv | sort > $(3)/.environment ;\
echo $(4) > $(3)/.laff ;\
echo $(5) > $(3)/.cell
target: dependencies
$(call FUNC,$(IS_DEFAULT),$(EX),$(OUTDIR),$(LAF
F),$(CELL))
All the call function does is perform `enumerated' variable substitution. Since I can't tell
which variables are local and which are global, I've made them all local (i.e. put the in the
call). I've also used faster equivalents for some parts of the shell expression.
I get the impression you're running up against the limitations of make. I've found the best
way to circumvent them is to write a Makefile which writes makefiles. If you have a look at my
recent conversation with Travis Emmitt in here, you'll see a simple example.
You also need to clearly distinguish between shell script and make script. The tabbed parts of
a makefile are (essentially) shell script, not make script.
-trent
| |
| Billy Patton 2004-11-17, 5:51 pm |
| On Wed, 17 Nov 2004, Trent Buck wrote:
> Quoth Billy Patton on or about 2004-11-17:
>
> How about this:
>
> FUNC = @set -e ;\
> test '$(1)' = 'file' \
> && echo $(2) > $(3)/.is_default \
> || touch $(3)/.is_default ;\
> date > $(3)/.is_default ;\
> printenv | sort > $(3)/.environment ;\
> echo $(4) > $(3)/.laff ;\
> echo $(5) > $(3)/.cell
>
> target: dependencies
> $(call FUNC,$(IS_DEFAULT),$(EX),$(OUTDIR),$(LAF
F),$(CELL))
>
> All the call function does is perform `enumerated' variable substitution. Since I can't tell
> which variables are local and which are global, I've made them all local (i.e. put the in the
> call). I've also used faster equivalents for some parts of the shell expression.
>
> I get the impression you're running up against the limitations of make. I've found the best
> way to circumvent them is to write a Makefile which writes makefiles. If you have a look at my
> recent conversation with Travis Emmitt in here, you'll see a simple example.
>
> You also need to clearly distinguish between shell script and make script. The tabbed parts of
> a makefile are (essentially) shell script, not make script.
>
> -trent
>
The limitations of make are exasperating but I've learned more about make in
the last week than I have in the last 15 years. My previous attitude about
make was to get it do compete what I want the first time then copy it forever.
My main concern ant attempt for make is to create a flow. We alread have in
inhouse piece of software that does this, It is written in PERL and works very
nice, debugging is hell, with all the eval's within eval's within evals' ...
make is not wuite as bad but has limits. I can write enough bash,perl, c and
c++ to make muy flow work.
I currently have 4 tasks, need to do many more, but an going to stope here.
Just refine what I have, shrink the # of lines in the top level make file,
currently 350 with no pod documentation yet added.
Need to prove that I can submit 35k+ jobs to LSF and get them completed within
a few hours.
Again I thank you very much for your continuing help.
I have read the make manual, hardcopy version, and frequently search info make.
But I'm constantly in a multi task mode, switching from
csh->bash->perl->c->c++->clearcase
___ _ ____ ___ __ __
/ _ )(_) / /_ __ / _ \___ _/ /_/ /____ ___
/ _ / / / / // / / ___/ _ `/ __/ __/ _ \/ _ \
/____/_/_/_/\_, / /_/ \_,_/\__/\__/\___/_//_/
/___/
Texas Instruments ASIC Circuit Design Methodology Group
Dallas, Texas, 214-480-4455, b-patton@ti.com
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