| Torben Ęgidius Mogensen 2006-07-10, 7:14 am |
| mikpe@harpo.csd.uu.se (Mikael Pettersson) writes:
> In article <7zwtalop60.fsf@app-2.diku.dk>,
> Torben Ęgidius Mogensen <torbenm@app-2.diku.dk> wrote:
>
> I disagree. PowerPC has this "feature" (r0 is either a constant
> 0 or a normal GPR depending on the instruction) and it just
> causes special cases and confusion in a compiler backend.
I think your problem is related to the fact that it _can_ be used as a
GPR, so the register allocator tries to use it (when its use doen't
conflict with the restrictions). If it can't be used as a GPR, you
just never allocate it, but only use it to encode special variants of
other instructions. I.e., it is only in the instruction selection
process that you need to worry about this register.
I would probably do the same in a compiler for the PPC -- with 32
registers, you can afford to have one that the register allocator
doesn't touch, but only use in prologues and epilogues of functions or
as a temporary register when encoding one intermediate-language
instruction a several PPC instructions (and, hence, know if these
instructions use it as 0 or not).
Torben
|