Hi! I am learing makefile recently.Now I have a problem.
I write a very simple program just like "hello world"
I write two makefile for it.One is included in another.
the first is makefile
include mainmake.mk
example:main.o
cc -o example main.o
clean:
rm -f *.o

this is the second makefile named mainmake.mk which is included in
makefile.
main.o:main.c head.h
cc -c -g main.c


when I type make command in shell.Only main.o file is created.The
file
main did not be created.What is the problem?I am in redhat 9.0

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dolphin <jdxyw2004@gmail.com> wrote:
> Hi! I am learing makefile recently.Now I have a problem.
> I write a very simple program just like "hello world"
> I write two makefile for it.One is included in another.
> the first is makefile
> include mainmake.mk
> example:main.o
>         cc -o example main.o
> clean:
>         rm -f *.o

> this is the second makefile named mainmake.mk which is included in
> makefile.
> main.o:main.c head.h
>         cc -c -g main.c


> when I type make command in shell.Only main.o file is created.The
> file main did not be created.What is the problem?I am in redhat 9.0

Typing just 'make' makes the target 'all' or the first target in the
file (considering included portions).  The first target is main.o.  Try
changing your one makefile like so:

| example:main.o
|         cc -o example main.o
|
| include mainmake.mk
|
| clean:
|         rm -f *.o

or so:

| include mainmake.mk
|
| all: example
|
| example:main.o
|         cc -o example main.o
| clean:
|         rm -f *.o
|

Then example will be first and invoked.  The other way around will still wor
k
if you type: 'make example'

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"dolphin" <jdxyw2004@gmail.com> wrote in news:1176713749.157272.90730
@l77g2000hsb.googlegroups.com:

> Hi! I am learing makefile recently.Now I have a problem.
> I write a very simple program just like "hello world"
> I write two makefile for it.One is included in another.
> the first is makefile
> include mainmake.mk
> example:main.o
>         cc -o example main.o
> clean:
>         rm -f *.o
>
> this is the second makefile named mainmake.mk which is included in
> makefile.
> main.o:main.c head.h
>         cc -c -g main.c
>
>
> when I type make command in shell.Only main.o file is created.The
> file
> main did not be created.What is the problem?I am in redhat 9.0
>

I believe your problem is that the default target for make
is the first target in the make file which, in your case,
would happen to be "main.o".

If you "make example", things should work as you expect
(barring any errors in the commands.)

If you want "example" to be the default target, then you
need to move the include after "example".

MV

--
I do not want replies; please follow-up to the group.

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"dolphin" <jdxyw2004@gmail.com> writes:

> Hi! I am learing makefile recently.Now I have a problem.
> I write a very simple program just like "hello world"
> I write two makefile for it.One is included in another.
> the first is makefile
> include mainmake.mk
> example:main.o
>         cc -o example main.o
> clean:
>         rm -f *.o
>
> this is the second makefile named mainmake.mk which is included in
> makefile.
> main.o:main.c head.h
>         cc -c -g main.c
>
>
> when I type make command in shell.Only main.o file is created.The
> file
> main did not be created.What is the problem?I am in redhat 9.0

The problem is that make executes by default the first target it
finds, after the inclusions are processed.

So either use:

make example

or add a default target first thing.

Makefile:

all:example
include mainmake.mk
example:main.o
..


--
__Pascal Bourguignon__
http://www.informatimago.com/
http://pjb.ogamita.org/

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